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The debate between Complex Instruction Set Computing (CISC) and Reduced Instruction Set Computing (RISC) has shaped processor design for decades. At A-Level you must understand the characteristics of each approach, compare them, and discuss their real-world significance.
A CISC processor has a large instruction set containing many specialised instructions, some of which perform complex multi-step operations in a single instruction.
| Feature | Detail |
|---|---|
| Number of instructions | Large (hundreds of different opcodes) |
| Instruction complexity | Some instructions carry out multi-step tasks (e.g. a single instruction might load from memory, perform an arithmetic operation, and store the result) |
| Instruction length | Variable — different instructions can be different lengths |
| Cycles per instruction | Variable — complex instructions take many clock cycles |
| Addressing modes | Many (often 10+) |
| Registers | Fewer general-purpose registers |
| Code density | High — programs need fewer instructions (each instruction does more work) |
| Hardware complexity | Complex decode logic, microcode used to implement instructions |
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