NAND and NOR Gates

NAND and NOR gates are derived from the fundamental AND and OR gates by adding a NOT operation to the output. They are extremely important in computing because each one alone can be used to build any other logic gate — a property known as functional completeness.

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The NAND Gate

What Does NAND Mean?

NAND stands for NOT AND. A NAND gate produces the opposite output to an AND gate. It is equivalent to an AND gate followed by a NOT gate.

How NAND Works

• The output is 0 only when both inputs are 1.
• In all other cases, the output is 1.

This is the exact inverse of the AND gate.

Truth Table for NAND

Input A	Input B	AND (A ∧ B)	NAND ¬(A ∧ B)
0	0	0	1
0	1	0	1
1	0	0	1
1	1	1	0

The NAND output column is the opposite of the AND output column.

NAND Gate Symbol

The NAND gate symbol is an AND gate with a bubble (small circle) at the output — the bubble indicates the NOT (inversion):

        +------\
  A ----|       )o---- Output ¬(A ∧ B)
  B ----|       )
        +------/

Boolean Expression for NAND

¬(A ∧ B) or equivalently NOT (A AND B)

The overline notation is: (A · B) with a bar over the entire expression.

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The NOR Gate

What Does NOR Mean?

NOR stands for NOT OR. A NOR gate produces the opposite output to an OR gate. It is equivalent to an OR gate followed by a NOT gate.

How NOR Works

• The output is 1 only when both inputs are 0.
• In all other cases, the output is 0.

This is the exact inverse of the OR gate.

Truth Table for NOR

Input A	Input B	OR (A ∨ B)	NOR ¬(A ∨ B)
0	0	0	1
0	1	1	0
1	0	1	0
1	1	1	0

The NOR output column is the opposite of the OR output column.

NOR Gate Symbol

The NOR gate symbol is an OR gate with a bubble at the output:

        +------\
  A ----|       \
        |       )o---- Output ¬(A ∨ B)
  B ----|       /
        +------/

Boolean Expression for NOR

¬(A ∨ B) or equivalently NOT (A OR B)

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Comparing All Six Gates

The block diagrams below show each compound gate as its base gate plus a NOT, side by side:

graph LR
    subgraph NAND["NAND = NOT (A AND B)"]
        A1((A)) --> AND1["AND"]
        B1((B)) --> AND1
        AND1 --> N1["NOT"] --> Q1((Q))
    end
    subgraph NOR["NOR = NOT (A OR B)"]
        A2((A)) --> OR2["OR"]
        B2((B)) --> OR2
        OR2 --> N2["NOT"] --> Q2((Q))
    end

Gate	Output is 1 when...	Rows with output 1	Expression
AND	Both inputs are 1	1 out of 4	A ∧ B
OR	At least one input is 1	3 out of 4	A ∨ B
NOT	Input is 0	1 out of 2	¬A
XOR	Inputs are different	2 out of 4	A ⊕ B
NAND	NOT both inputs are 1	3 out of 4	¬(A ∧ B)
NOR	Both inputs are 0	1 out of 4	¬(A ∨ B)

Exam Tip: Notice the symmetry: NAND has the same number of 1s in its output as OR (3 out of 4), and NOR has the same number as AND (1 out of 4). This is because NAND is the inverse of AND, and NOR is the inverse of OR.

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Universal Gates

Both NAND and NOR are called universal gates because either one alone can be used to construct any other logic gate (NOT, AND, OR, XOR and each other). This is called functional completeness.

Building NOT from NAND

Connect both inputs of a NAND gate to the same signal:

        +------\
  A ----|       )o---- Output (¬A)
  A ----|       )
        +------/

When A = 0: NAND(0, 0) = 1 (same as NOT 0 = 1). When A = 1: NAND(1, 1) = 0 (same as NOT 1 = 0).

Building AND from NAND

Use two NAND gates — the first performs NAND, the second inverts the result (acting as NOT):

        +------\          +-----\
  A ----|       )o---+----|      >o---- Output (A ∧ B)
  B ----|       )    +----|      >
        +------/          +-----/

Building OR from NAND

Use three NAND gates — two acting as NOT gates on each input, feeding into a third NAND gate.

This universal property is why NAND gates are the most commonly used gates in real integrated circuits — manufacturers can build entire processors using only NAND gates.

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NAND and NOR in Practice

In the real world, NAND and NOR gates are used in:

• Flash memory — the storage in USB drives, SSDs and memory cards uses NAND flash technology (named after the NAND gate structure).
• Processor design — CPUs are often designed using NAND-only or NOR-only architectures because it simplifies manufacturing.
• SR latches — basic memory circuits can be built from two cross-coupled NAND or NOR gates.

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Key Differences Between NAND and NOR

Property	NAND	NOR
Full name	NOT AND	NOT OR
Output is 0 when...	Both inputs are 1	Any input is 1
Output is 1 when...	Not both inputs are 1	Both inputs are 0
Equivalent to...	AND + NOT	OR + NOT
Symbol identifier	AND shape + bubble	OR shape + bubble

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Summary

• NAND = NOT AND. Output is 0 only when both inputs are 1.
• NOR = NOT OR. Output is 1 only when both inputs are 0.
• Both are drawn as their base gate (AND or OR) with a bubble at the output.
• Both NAND and NOR are universal gates — each can build any other gate.
• NAND gates are the most widely used gates in real chip manufacturing.
• Boolean expressions: NAND = ¬(A ∧ B), NOR = ¬(A ∨ B).

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Note on the AQA specification: Like XOR, NAND and NOR are not separately listed in AQA GCSE Computer Science (8525) section 3.4.2; only AND, OR and NOT are required. They are taught here because their behaviour is easily expressed using AND/OR/NOT, and they help build understanding of De Morgan's laws and Boolean simplification.

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Worked Examples for NAND

Worked Example 1: Two-Input NAND Truth Table

NAND is "NOT AND" — the opposite of AND.