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A logic circuit is a physical implementation of a Boolean expression using interconnected logic gates. In OCR H446, you need to be able to draw circuits from Boolean expressions, trace circuits to produce truth tables, and understand multi-level circuits with several stages of gates.
To convert a Boolean expression into a circuit:
Example: Draw the circuit for Q = (A AND B) OR (NOT C)
The main operation is OR, so the output gate is OR.
Circuit structure:
A ---+
|--- AND ---+
B ---+ |--- OR --- Q
|
C --- NOT -------+
To determine the expression from a circuit:
Example: A circuit has:
P = NOT A R = P AND B = (NOT A) AND B Q = R OR C = ((NOT A) AND B) OR C
To produce a truth table from a circuit:
Worked Example:
Circuit: Q = (A XOR B) AND (B OR C)
| A | B | C | A XOR B | B OR C | Q |
|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 0 | 1 | 1 | 1 |
| 0 | 1 | 1 | 1 | 1 | 1 |
| 1 | 0 | 0 | 1 | 0 | 0 |
| 1 | 0 | 1 | 1 | 1 | 1 |
| 1 | 1 | 0 | 0 | 1 | 0 |
| 1 | 1 | 1 | 0 | 1 | 0 |
A multi-level circuit has more than two stages of gates between inputs and output. Each stage introduces a gate delay — the time for a signal to propagate through a gate.
Example: A 3-level circuit:
Level 1: P = A AND B
R = C OR D
Level 2: S = P XOR R
T = NOT D
Level 3: Q = S AND T
Expression: Q = ((A AND B) XOR (C OR D)) AND (NOT D)
Gate delay: The signal must pass through 3 gates sequentially to reach Q. If each gate has a delay of 10 nanoseconds, the total propagation delay is 30 nanoseconds.
| Concept | Detail |
|---|---|
| Fan-in | The number of inputs to a gate |
| Fan-out | The number of gates an output connects to |
| Propagation delay | Time for a signal to pass through one gate |
| Circuit depth | Number of gate levels from input to output |
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