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Once you can read binary, the next step is to compute with it. This lesson covers binary addition and the precise meaning of overflow, binary subtraction carried out by adding a two's complement, and bit shifting — both logical and arithmetic — together with how shifts multiply and divide by powers of two.
This lesson addresses the H446 1.4.1 Data Types content on operating on binary integers:
(This is a paraphrase of the specification content, not a verbatim quotation.)
Binary addition uses exactly the same column-and-carry method as denary addition; the only difference is that a column "fills up" at 2 instead of at 10. There are four single-bit cases plus the carry-in case:
| A | B | Sum bit | Carry out |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
The only one that surprises beginners is 1+1: in binary this is 102, so you write a 0 and carry a 1 into the next column — directly analogous to 5+5=10 in denary, where you write 0 and carry 1. When a carry also arrives into a column you can get three 1s:
1+1+1=112⇒write 1, carry 1
So the worst a single column can produce is a sum bit of 1 with a carry of 1 — a carry can never be larger than 1, which keeps the method simple. This is a genuine convenience of base 2: in denary a column can carry at most 1 but the sum digit can be anything from 0 to 9, whereas in binary both the written digit and the carry are confined to {0, 1}, so there are only a handful of cases to learn. The discipline that earns marks is to work strictly right to left, write the sum bit underneath, and carry any 1 into the next column before you move on — never try to add a whole binary number in one glance.
Working right to left and tracking carries:
| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 | Denary | |
|---|---|---|---|---|---|---|---|---|---|
| Carry | 1 | 1 | 1 | 1 | 1 | 1 | |||
| A | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 107 |
| B | 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 53 |
| Sum | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 160 |
Check: 107+53=160, and 101000002=128+32=160. Correct, and the result still fits in 8 bits.
It is worth walking the rightmost few columns of that sum slowly, because the carry behaviour is where marks are won and lost. In column b0 we add 1+1=102: write 0, carry 1. In column b1 we add 1+0 plus the carried 1, giving 1+0+1=102: write 0, carry 1. In column b2 we add 0+1 plus the carried 1: 0+1+1=102: write 0, carry 1. Each of these is the three-input case, and each produces a 0 with a carry — which is exactly why a run of carries propagates leftward through the number. Following the carry chain by hand once or twice makes the table above feel obvious rather than mysterious.
Adding 1 to 00111111 (63) shows a carry rippling through several columns before finally settling:
| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 | Denary | |
|---|---|---|---|---|---|---|---|---|---|
| Carry | 1 | 1 | 1 | 1 | 1 | 1 | |||
| A | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 63 |
| B | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
| Sum | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 64 |
The carry propagates from b0 all the way to b6, where 0+0+1=1 absorbs it and the chain stops. 63+1=64=010000002. No carry leaves the MSB, so the result fits comfortably in 8 bits and there is no overflow.
| b8 | b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 | Denary | |
|---|---|---|---|---|---|---|---|---|---|---|
| Carry | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ||
| A | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 255 | |
| B | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | |
| Sum | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 256 |
The true answer is 255+1=256, but 256=1000000002 needs nine bits. In an 8-bit register the ninth bit (b8) has nowhere to go: the stored result is 00000000 and a carry-out is produced from the most significant bit. This is an overflow.
Overflow occurs when the result of a calculation is too large (or, for signed numbers, too large in magnitude) to fit in the available number of bits. What "too large" means depends on whether the bits are being interpreted as unsigned or as signed two's complement — and this is a distinction examiners reward you for making explicit.
| Bits | Unsigned range | Signed (two's complement) range |
|---|---|---|
| 8 | 0 to 255 | -128 to +127 |
| 16 | 0 to 65,535 | -32,768 to +32,767 |
| 32 | 0 to 4,294,967,295 | -2,147,483,648 to +2,147,483,647 |
Unsigned overflow is simple to detect: it has happened whenever there is a carry-out from the most significant bit, because the sum has exceeded the top of the range. The example above (255+1) is exactly this case.
Signed overflow is different and cannot be detected by the carry-out alone. In two's complement, overflow is signalled by an impossible change of sign:
(Adding a positive and a negative number can never overflow, because the magnitude of the result is no larger than the larger operand.) A reliable hardware-level rule is: signed overflow has occurred if and only if the carry into the most significant bit differs from the carry out of it. You will meet a fuller treatment in the two's complement lesson; for now, the key idea is that the same bit pattern may or may not represent an overflow depending on how it is being interpreted.
Add 01100100 (+100) and 00110010 (+50) as signed 8-bit values:
| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 | Denary | |
|---|---|---|---|---|---|---|---|---|---|
| A | 0 | 1 | 1 | 0 | 0 | 1 | 0 | 0 | +100 |
| B | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 0 | +50 |
| Sum | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 0 | -106 (!) |
There is no carry-out of the MSB, so an unsigned interpretation would report no overflow and the answer 150 would be correct. But read as signed, two positive numbers have produced a result whose sign bit is 1 — apparently −106. The true answer, +150, is beyond the signed maximum of +127, so this is a signed overflow. This single example is the clearest demonstration of why you must state your interpretation: the very same eight bits are a valid result unsigned and an overflow signed.
The practical consequence of an undetected overflow is a silently wrong answer — the program continues with corrupted data. This is why processors set a status flag (a carry flag for unsigned, an overflow flag for signed) that programs can test after an arithmetic operation.
Exam Tip: In any addition question, finish by checking whether the result fits the stated bit width. If it does not, name it as overflow, say whether it is unsigned (carry-out of the MSB) or signed (sign changed impossibly), and state the consequence — a stored result that is wrong.
Computers rarely build a separate subtraction circuit. Instead, they reuse the adder: subtracting B is the same as adding the negative of B. This is one of the headline advantages of two's complement — a single adder circuit handles both addition and subtraction, halving the arithmetic hardware the processor needs and keeping the design simpler and faster. In practice the same physical adder is fed either B (to add) or the two's complement of B (to subtract), selected by a control line.
A−B=A+(−B)
The negative of B is its two's complement, formed in two steps:
Here A=101101002=180 and B=010010112=75; we expect 180−75=105.
Step 1 — negate B:
B=01001011 flip all bits→10110100 add 1→10110101(=−75 in two’s complement)
Step 2 — add A+(−B):
| b8 | b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 | Interpretation | |
|---|---|---|---|---|---|---|---|---|---|---|
| A | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 180 | |
| -B | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | -75 | |
| Sum | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | carry-out discarded |
A carry-out of the most significant bit is produced (the "9th bit"). In two's complement subtraction this carry is discarded — it is expected and is not an error. Dropping it leaves:
011010012=64+32+8+1=105
Check: 180−75=105. Correct.
The reason the carry is simply thrown away is that the two's complement of an 8-bit number is, in effect, arithmetic modulo 28; the discarded carry is the 256 that the modular arithmetic removes. You do not need that depth for most marks, but it explains why "discard the carry" is always safe here rather than being an ad-hoc rule.
Compute 00100011−00110000, i.e. 35−48; we expect −13.
Negate the subtrahend 00110000: flip to 11001111, add 1 to get 11010000 (which is −48).
Add: 00100011+11010000=11110011. This time there is no carry-out of the MSB, and crucially we do not invent one. The result 11110011 has its sign bit set, so it is negative; converting back (flip →00001100, add 1 →00001101=13) confirms it is −13. Correct.
This contrast matters: when the true answer is positive a carry-out appears and is discarded; when the true answer is negative no carry-out appears and there is nothing to discard. In both cases you simply read the 8-bit result as a two's complement number — the presence or absence of the carry takes care of itself.
A shift moves every bit in a number left or right by a fixed number of positions. Shifts are among the cheapest operations a processor can perform — physically, a shift can be implemented largely by wiring bits to different positions rather than by computing anything — and they have a neat arithmetic meaning: in base 2, shifting left or right multiplies or divides by powers of 2, exactly as moving the decimal point does in base 10. There are two families, logical and arithmetic, and the only difference between them is what gets fed into the vacated positions, which is determined by whether the data is unsigned or signed.
A logical shift treats the value as a plain pattern of bits with no sign — appropriate for unsigned numbers. Vacated positions are always filled with 0.
Logical left shift — each place shifted left multiplies the value by 2:
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