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This lesson covers primary storage — the memory that the CPU can access directly, including RAM, ROM, cache and virtual memory. For the OCR H446 exam, you must understand how each type works, the differences between SRAM and DRAM, the cache hierarchy, and the role of virtual memory.
Primary storage (also called main memory or internal memory) is memory that the CPU can access directly via the system bus. It includes RAM, ROM and cache. Primary storage is fast but generally volatile (except ROM) and limited in capacity compared to secondary storage.
RAM is volatile — it loses all its contents when the power is switched off. It stores the currently running programs and data that the CPU needs to access quickly.
| Feature | Detail |
|---|---|
| How it works | Each bit is stored as a charge in a tiny capacitor. The charge leaks over time, so the memory must be refreshed thousands of times per second |
| Density | High — each cell requires only one transistor and one capacitor, so many bits can be packed into a small area |
| Speed | Slower than SRAM due to refresh cycles |
| Cost | Cheaper per bit than SRAM |
| Power | Moderate — needs continuous refreshing |
| Use | Main memory (RAM) in PCs, laptops, servers |
| Feature | Detail |
|---|---|
| How it works | Each bit is stored using a flip-flop circuit made of 4-6 transistors. The data is held as long as power is supplied — no refreshing needed |
| Density | Low — each cell requires multiple transistors, so fewer bits per unit area |
| Speed | Very fast — no refresh delay |
| Cost | More expensive per bit than DRAM |
| Power | Lower idle power (no refresh), but more transistors per bit |
| Use | CPU cache (L1, L2, L3) |
| Feature | DRAM | SRAM |
|---|---|---|
| Storage mechanism | Capacitor (charge) | Flip-flop (transistors) |
| Needs refreshing? | Yes | No |
| Speed | Slower | Faster |
| Density | Higher | Lower |
| Cost per bit | Cheaper | More expensive |
| Power consumption | More (refresh cycles) | Less (no refresh) |
| Used for | Main memory (RAM) | CPU cache |
Exam Tip: A common question asks why cache uses SRAM rather than DRAM. Answer: SRAM is faster (no refresh delay), which is essential for cache because the CPU needs data from cache in as few clock cycles as possible. The higher cost and lower density are acceptable because cache is small.
ROM is non-volatile — it retains its contents when the power is switched off. It stores permanent, essential software that rarely (or never) changes.
| Variant | Description |
|---|---|
| ROM | Contents set during manufacture; cannot be changed |
| PROM | Programmable ROM — can be written to once after manufacture using a special programmer |
| EPROM | Erasable PROM — can be erased by exposure to UV light and then reprogrammed |
| EEPROM | Electrically Erasable PROM — can be erased and reprogrammed electrically, byte by byte |
| Flash ROM | A form of EEPROM that can be erased and rewritten in blocks. Used in firmware storage |
Cache is a small amount of very fast SRAM located inside or very close to the CPU. Its purpose is to store copies of frequently accessed data and instructions so the CPU does not have to wait for slower main memory (DRAM).
| Level | Location | Size | Speed | Purpose |
|---|---|---|---|---|
| L1 | Inside each CPU core | Very small (32-128 KB per core) | Fastest | Stores the most frequently accessed data/instructions. Often split into L1-I (instructions) and L1-D (data) |
| L2 | Inside or close to each core | Small-medium (256 KB - 1 MB per core) | Fast | Stores data that does not fit in L1 |
| L3 | Shared between all cores | Medium-large (4-64 MB) | Moderate (slower than L1/L2) | Shared cache; reduces the need to access main memory |
When the CPU needs data:
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