The Processor: Registers, Buses, and the FDE Cycle

At A-Level you must go beyond a surface-level understanding of the CPU. This lesson covers the internal architecture of a typical processor — its key registers, the bus system, and the detailed steps of the Fetch-Decode-Execute (FDE) cycle.

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Internal Structure of the CPU

A simplified block diagram of a processor includes:

┌─────────────────────────────────────────────────┐
│                    CPU                           │
│                                                  │
│  ┌────────┐   ┌────────┐   ┌────────────────┐   │
│  │  ALU   │   │  CU    │   │   Registers    │   │
│  └────────┘   └────────┘   │  PC, MAR, MDR, │   │
│                             │  CIR, ACC, IX  │   │
│                             └────────────────┘   │
└──────────────────┬──────────────────────────────┘
                   │  System Bus (Address + Data + Control)
                   ▼
            ┌────────────┐
            │ Main Memory│
            └────────────┘

The Arithmetic Logic Unit (ALU)

The ALU performs:

• Arithmetic operations — addition, subtraction, multiplication, division.
• Logical operations — AND, OR, NOT, XOR.
• Comparison operations — equal, greater than, less than (setting status flags).
• Shift operations — logical and arithmetic shifts.

The Control Unit (CU)