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Adder circuits are fundamental building blocks of computer arithmetic. Every processor uses adders to perform addition, and understanding how they work from basic logic gates is a core part of the OCR H446 specification.
Binary addition follows the same rules as decimal addition, but with only two digits (0 and 1):
| A | B | Sum | Carry |
|---|---|---|---|
| 0 + 0 | 0 | 0 | |
| 0 + 1 | 1 | 0 | |
| 1 + 0 | 1 | 0 | |
| 1 + 1 | 0 | 1 |
When both bits are 1, the sum is 0 with a carry of 1 (just like 5 + 5 = 10 in decimal — the "0" stays and the "1" carries to the next column).
A half adder adds two single-bit inputs (A and B) and produces a sum (S) and a carry (C).
Truth table:
| A | B | Sum (S) | Carry (C) |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
Observations:
Circuit:
A ---+--- XOR --- S (Sum)
|
B ---+--- AND --- C (Carry)
The half adder uses just two gates: one XOR and one AND.
Why is it called "half"? Because it can only add two bits — it has no input for a carry-in from a previous column. When adding multi-bit numbers, each column (except the least significant) must also handle a carry from the previous column.
A full adder adds three single-bit inputs: A, B, and a carry-in (Cin). It produces a sum (S) and a carry-out (Cout).
Truth table:
| A | B | Cin | Sum (S) | Cout |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 | 1 |
Boolean expressions:
Explanation of Cout: There is a carry-out if:
A full adder can be constructed from two half adders and an OR gate:
Half Adder 1: Inputs A and B
Half Adder 2: Inputs S1 and Cin
Final carry: Cout = C1 OR C2 = (A AND B) OR ((A XOR B) AND Cin)
A ---+ +--- S
|--- Half Adder 1 ---S1---|
B ---+ | +--- Half Adder 2 ---S
C1---------+ |
| Cin--+
| C2
+--OR------ Cout
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