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In real computer circuits, individual logic gates are combined to create more complex operations. OCR J277 Section 2.5 requires you to be able to trace through combined logic gate circuits, complete truth tables for multi-gate circuits, and write Boolean expressions from circuit diagrams.
A logic circuit (also called a combinational circuit) connects the output of one gate to the input of another. By chaining gates together, we can create circuits that implement complex Boolean expressions.
For example, to implement the expression Q = (A AND B) OR C, we need:
flowchart LR
A((A)) --> AND["AND"]
B((B)) --> AND
AND --> OR["OR"]
C((C)) --> OR
OR --> Q((Q))
To determine the output of a combined circuit for given inputs, follow these steps:
Consider the circuit: Q = NOT (A OR B)
With A = 1, B = 0:
| Step | Operation | Result |
|---|---|---|
| 1 | A OR B | 1 OR 0 = 1 |
| 2 | NOT (result of step 1) | NOT 1 = 0 |
So Q = 0.
OCR Exam Tip: When tracing through a circuit, work through one gate at a time, writing down intermediate results. Do not try to calculate the whole circuit in your head — this leads to errors.
To build a truth table for a circuit with multiple inputs, you need columns for:
Circuit: Q = (A AND B) OR (NOT A)
| A | B | A AND B | NOT A | Q = (A AND B) OR (NOT A) |
|---|---|---|---|---|
| 0 | 0 | 0 | 1 | 0 OR 1 = 1 |
| 0 | 1 | 0 | 1 | 0 OR 1 = 1 |
| 1 | 0 | 0 | 0 | 0 OR 0 = 0 |
| 1 | 1 | 1 | 0 | 1 OR 0 = 1 |
The intermediate columns (A AND B and NOT A) make it much easier to get the correct final answer.
When a circuit has three inputs (A, B, C), the truth table has 2^3 = 8 rows:
| A | B | C | A AND B | Q = (A AND B) OR C |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 | 1 |
| 0 | 1 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 0 | 0 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 1 | 1 |
| 1 | 1 | 1 | 1 | 1 |
OCR Exam Tip: For three-input truth tables, count in binary from 000 to 111 to list all eight input combinations systematically. Never try to list them randomly — you will miss one.
When given a circuit diagram in the exam, convert it to a Boolean expression by:
For example, if the final gate is OR, and its inputs come from an AND gate (with inputs A, B) and a NOT gate (with input C):
Q = (A AND B) OR (NOT C)
The diagram below shows how three inputs flow through three gates to produce Q. Trace from left to right: A and B feed into the AND gate; C feeds into the NOT gate; the AND output and the NOT output feed into the OR gate, which produces Q.
flowchart LR
A((A)) --> AND[AND gate]
B((B)) --> AND
C((C)) --> NOT[NOT gate]
AND --> OR[OR gate]
NOT --> OR
OR --> Q((Q))
In an exam diagram the AND, NOT, and OR boxes would be drawn with their standard symbols (flat-back D, triangle-with-bubble, curved shield), but the wiring topology is exactly the same as shown here.
The half adder adds two single-bit numbers and produces a sum and a carry:
flowchart LR
A((A)) --> XOR["XOR"]
B((B)) --> XOR
A --> AND["AND"]
B --> AND
XOR --> Sum((Sum))
AND --> Carry((Carry))
| A | B | Sum (A XOR B) | Carry (A AND B) |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
This demonstrates how combining just two gates creates a useful arithmetic circuit.
Consider the expression Q = (A . B) + ((NOT A) . C). This circuit uses four gates: one NOT, two ANDs, and one OR.
flowchart LR
A((A)) --> NOT["NOT"]
NOT --> AND1["AND 1"]
B((B)) --> AND2["AND 2"]
C((C)) --> AND2
AND1 --> OR["OR"]
AND2 --> OR
OR --> Q((Q))
Wait — let me correct that. AND 1 takes (NOT A) and C, and AND 2 takes A and B. Redrawn clearly:
flowchart LR
A((A)) --> NA["NOT A"]
A --> AND2["AND 2: A . B"]
B((B)) --> AND2
NA --> AND1["AND 1: (NOT A) . C"]
C((C)) --> AND1
AND2 --> OR["OR"]
AND1 --> OR
OR --> Q((Q))
Truth table:
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