OCR GCSE CS: Systems Architecture

Master CPU architecture, the fetch-decode-execute cycle, performance factors, embedded systems, buses, and I/O devices for OCR J277 Section 1.1.

What you'll cover

• The Purpose of the CPU
• Von Neumann Architecture
• The Fetch-Decode-Execute Cycle
• CPU Performance Factors
• Common CPU Components and Registers
• Embedded Systems and Their Uses