Systems Architecture Exam Practice

This lesson brings together all the topics from OCR J277 Section 1.1 (Systems Architecture) and provides exam-style questions with model answers. Use this to consolidate your knowledge and practise the skills needed for Paper 1.

---

Key Topics to Revise

Before attempting the practice questions, ensure you are confident with:

Topic	Key Points
CPU purpose	Fetches, decodes, and executes instructions
Von Neumann architecture	Stored program concept; shared memory for data and instructions
Registers	PC, MAR, MDR, ACC — their purposes and how they interact
FDE cycle	Step-by-step process of fetching, decoding, and executing
CPU performance	Clock speed, cache size, number of cores
Embedded systems	Dedicated function, examples, advantages/disadvantages
Buses	Address (unidirectional), data (bidirectional), control (bidirectional)
Input devices	Keyboard, mouse, sensors, scanners, etc.
Output devices	Monitor, printer, speakers, actuators

---

Exam Technique: Command Words

OCR uses specific command words that tell you what type of answer is expected:

Command Word	What to Do	Typical Marks
State	Give a brief, factual answer	1 mark
Identify	Name or select the correct item	1 mark
Describe	Give a detailed account of features or processes	2-4 marks
Explain	Give reasons or causes — say why or how	2-4 marks
Compare	Identify similarities and/or differences	2-4 marks
Discuss	Consider different aspects, advantages, and disadvantages	4-8 marks

OCR Exam Tip: Always match the depth of your answer to the number of marks available. A 1-mark question needs a brief answer; a 4-mark question needs detailed explanation.

---

Practice Question 1: The FDE Cycle (4 marks)

Question: Describe the three stages of the fetch-decode-execute cycle, naming the registers involved at each stage.

Model Answer:

Fetch: The address in the Program Counter (PC) is copied to the Memory Address Register (MAR). The instruction at that address is fetched from memory and placed in the Memory Data Register (MDR). The PC is incremented by 1. [2 marks]

Decode: The Control Unit (CU) takes the instruction from the MDR and decodes it, splitting it into the opcode (operation) and operand (data/address). [1 mark]

Execute: The instruction is carried out. If it is a calculation, the ALU performs it and stores the result in the Accumulator (ACC). If it is a branch, the PC is updated to a new address. [1 mark]

---

Practice Question 2: CPU Performance (3 marks)

Question: A games designer is choosing a new CPU. Explain how each of the following affects CPU performance: (a) Clock speed (b) Number of cores (c) Cache size

Model Answer:

(a) Clock speed determines how many FDE cycles the CPU completes per second. A higher clock speed (measured in GHz) means instructions are processed faster. [1 mark]

(b) Number of cores affects how many tasks can be processed simultaneously. Each core can execute its own FDE cycle independently, enabling parallel processing. However, not all software can use multiple cores effectively. [1 mark]

(c) Cache size determines how much frequently used data can be stored close to the CPU. Larger cache means more cache hits and fewer slow accesses to RAM, improving overall speed. [1 mark]

---

Practice Question 3: Embedded Systems (4 marks)

Question: A modern car contains several embedded systems. Give two examples of embedded systems in a car and for each, explain the input(s) and output(s).

Model Answer:

Example 1: Engine management system

• Input: Temperature sensor, oxygen sensor (measure engine conditions)
• Output: Actuators that adjust fuel injection rate and ignition timing
• The embedded system continuously monitors engine conditions and adjusts settings for optimal performance and efficiency. [2 marks]

Example 2: Anti-lock braking system (ABS)

• Input: Speed sensors on each wheel (detect if a wheel is about to lock)
• Output: Solenoid valves that rapidly release and apply brake pressure
• The embedded system prevents wheels from locking during heavy braking, maintaining steering control. [2 marks]

---

Practice Question 4: Buses (3 marks)

Question: Explain the role of each of the three buses in the system bus.

Model Answer:

Address bus: Carries the memory address from the CPU to memory. It is unidirectional. The width of the address bus determines how much memory the CPU can address (2^n locations for an n-bit bus). [1 mark]

Data bus: Carries data between the CPU, memory, and I/O devices. It is bidirectional. A wider data bus allows more data to be transferred per clock cycle. [1 mark]

Control bus: Carries control signals (such as read, write, clock, and interrupt) between the CPU and other components. It is bidirectional and coordinates the timing of operations. [1 mark]

---

Practice Question 5: Input and Output Devices (4 marks)

Question: A library uses a self-service system where members can borrow and return books.

(a) Suggest a suitable input device for identifying each book and explain how it works. [2 marks] (b) Suggest a suitable output device to confirm the transaction to the user and explain why it is appropriate. [2 marks]

Model Answer:

(a) A barcode scanner would be suitable. It emits a laser or LED light onto the barcode on the book. The pattern of reflected light (representing black bars and white spaces) is decoded into a unique ISBN number that identifies the book in the library database. [2 marks]

(b) A touchscreen monitor would be suitable as it can display a confirmation message (e.g. "Book borrowed successfully — due back 14/05/2026") that the user can read. A touchscreen also serves as an input device, allowing users to navigate menus and confirm their choices without needing a separate keyboard or mouse. [2 marks]

---

Common Mistakes to Avoid

Mistake	Correction
Saying the CPU "stores" data	The CPU processes data; memory stores it
Confusing MAR and MDR	MAR holds the address; MDR holds the data
Saying RAM is non-volatile	RAM is volatile (loses data when power is off)
Ignoring the question's context	Always relate your answer to the specific scenario given
Writing too little for high-mark questions	Match your answer length to the marks available

---

Summary

• OCR J277 Paper 1 tests your understanding of systems architecture through short-answer and extended-response questions.
• Always use correct technical terminology (register names, bus names, component names).
• Match the depth of your answer to the marks available.
• Use worked examples to practise tracing the FDE cycle and explaining CPU performance factors.
• Review the command words so you know exactly what each question is asking.

OCR Exam Tip: In the exam, read the question twice before writing. Underline key words (describe, explain, compare) and the topic (FDE cycle, embedded system, etc.) to ensure you answer precisely what is being asked.

---

Worked Example: Tackling a Full Synoptic Question

Synoptic questions draw together several topics from Section 1.1 at once. Approaching them methodically is the difference between scraping a few marks and banking them all.